Sable CPU Module Specification
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Sable CPU Module Specification

Sable CPU Module Specification Sable CPU Module Specification

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Table 8: EXC_SUM Copyright © 1993 Digital Equipment Corporation. Field Description Tye 33 MSK - Exception Register Write Mask IPR Window. RC 8 IOV - Indicates Fbox Convert to Integer Overflow or Integer Arithmetic Overflow WA 7 INE - Indicates Floating Inexact Error WA 6 UNF - Indicates Floating Point Underflow WA 5 FOV - Indicates Floating Point Overflow WA 4 DZE - Indicates Divide by Zero WA 3 INV - Indicates Invalid Operation WA 2 SWC - Indicates Software Completion possible. The bit is set after a floating point instruction containing the /S modifier completes with an arithmetic trap and all previous floating point instructions that trapped since the last MTPR EXC_SUM also contained the /S modifier. The SWC bit is cleared whenever a floating point instruction without the /S modifier completes with an arithmetic trap. The bit remains cleared regardless of additional arithmetic traps until the register is written via an MTPR instruction. The bit is always cleared upon any MTPR write to the EXC_SUM register. WA Functions Located on the DECchip 21064 27

Copyright © 1993 Digital Equipment Corporation. 3.1.18 Privileged Architecture Library Base Register (PAL_BASE) The PAL base register is a read/write register containing the base address for PALcode. This register is cleared by hardware at reset. Figure 14: PAL_BASE 6 3 28 Functions Located on the DECchip 21064 3 3 4 3 1 1 4 3 IGN/RAZ PAL_BASE[33..14] IGN / RAZ 0 0 PAL_BASE

Copyright © 1993 Digital Equipment Corporation.<br />

3.1.18 Privileged Architecture Library Base Register (PAL_BASE)<br />

The PAL base register is a read/write register containing the base address for PALcode.<br />

This register is cleared by hardware at reset.<br />

Figure 14: PAL_BASE<br />

6<br />

3<br />

28 Functions Located on the DECchip 21064<br />

3 3<br />

4 3<br />

1 1<br />

4 3<br />

IGN/RAZ PAL_BASE[33..14]<br />

IGN<br />

/<br />

RAZ<br />

0<br />

0<br />

PAL_BASE

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