Sable CPU Module Specification

Copyright © 1993 Digital Equipment Corporation.
3.1.9 Instruction Translation BUffer Page Table Entry Temporary
Register(ITB_PTE_TEMP)
The ITB_PTE_TEMP register is a read-only holding register for ITB_PTE read data.
Reads of the ITB_PTE require two instructions to return the data to the register
file. The first reads the ITB_PTE register to the ITB_PTE_TEMP register. The
second returns the ITB_PTE_TEMP register to the integer register file. The ITB_
PTE_TEMP register is updated on all ITB accesses, both read and write. A read
of the ITB_PTE to the ITB_PTE_TEMP should be followed closely by a read of the
ITB_PTE_TEMP to the register file.
Reading the ITB_PTE_TEMP register is only performed while in PALmode regardless
of the state of the HWE bit in the ICCSR IPR.
Figure 8: ITB_PTE_TEMP
6
3
3
5
3
4
3
3
A
U S E K
RAZ S PFN[33..13] R R R R RAZ
M
E E E E
3.1.10 Exception Address Register (EXC_ADDR)
1
3
1
2
1
1
1
0
0
9
0
8
0
0
ITB_PTE_TEMP
The EXC_ADDR register is a read/write register used to restart the machine after exceptions
or interrupts. The EXC_ADDR register can be read and written by software
by way of the HW_MTPR instruction as well as being written directly by hardware.
The HW_REI instruction executes a jump to the address contained in the EXC_
ADDR register. The EXC_ADDR register is written by hardware after an exception
to provide a return address for PALcode.
The instruction pointed to by the EXC_ADDR register did not complete execution.
Since the PC is longword aligned, the lsb of the EXC_ADDR register is used to
indicate PALmode to the hardware. When the lsb is clear, the HW_REI instruction
executes a jump to native (non-PAL) mode, enabling address translation.
CALL_PAL exceptions load the EXC_ADDR with the PC of the instruction following
the CALL_PAL. This function allows CALL_PAL service routines to return without
needing to increment the value in the EXC_ADDR register.
This feature, however, requires careful treatment in PALcode. Arithmetic traps and
machine check exceptions can pre-empt CALL_PAL exceptions resulting in an incorrect
value being saved in the EXC_ADDR register. In the cases of an arithmetic
trap or a machine check exception, and only in these cases, EXC_ADDR takes
on special meaning. PALcode servicing these two exceptions should interpret a zero
in EXC_ADDR as indicating that the PC in EXC_ADDR is too large by a
value of 4 bytes and subtract 4 before executing a HW_REI from this address. PALcode
should interpret a one in EXC_ADDR as indicating that the PC in EXC_
Functions Located on the DECchip 21064 21