Sable CPU Module Specification

Copyright © 1993 Digital Equipment Corporation.
The BC_TAG register contains information which can relate to any of the error conditions
listed above.
Each of the above two sets of error registers can contain information about either
corrected or uncorrected hardware errors. When a hardware error occurs information
about that error is loaded into the appropriate set of error registers and those
registers are locked against further updates until PALcode explicitly unlocks them.
If a second error occurs between the time that an initial error occurs and the time
that software unlocks the associated error reporting registers, information about the
second is lost.
When the 21064 recognizes the second error it still posts the required corrected read
interrupt or machine check, however it does not overwrite information previously
locked in an error reporting register. If the second hardware error is not correctable
and the error reporting register normally associated with this second error is already
locked, the 21064 will set a bit to indicate that information about an uncorrecable
hardware error was lost. Each set of error reporitng registers has a bit to report
these fatal errors.
For example, BIU_STAT[FATAL1] is set by hardware to indicate that a tag probe
parity error or HARD_ERROR terminated external transaction occurred while BIU_
STAT[6..0], BIU_ADDR and BC_TAG were already locked due to some previous error.
Similarly, BIU_STAT[FATAL2] is set by hardware to indicate that a primary cache
fill received either a parity or single or dobule bit EDC error while BIU_STAT[13..8],
FILL_ADDR, FILL_SYNDROME, and BC_TAG were already locked.
242 Cobra Specific ( Privileged Architecture Library Code ) PALcode