Sable CPU Module Specification
Sable CPU Module Specification Sable CPU Module Specification
C.3.1 HW_MFPR and HW_MTPR Copyright © 1993 Digital Equipment Corporation. The internal processor register specified by the PAL, ABX, IBX, and index field is written/read with the data from the specified integer register. Processor registers may have side effects that happen as the result of writing/reading them. Coding restrictions are associated with accessing various registers. Separate bits are used to access Abox IPRs, Ibox IPRs, and PAL_TEMPs, therefore it is possible for an MTPR instructions to write multiple registers in parallel if they both have the same index. The HW_MFPR and HW_MTPR instructions have the following format: 3 2 2 2 2 1 1 0 0 0 0 0 0 1 6 5 1 0 6 5 8 7 6 5 4 0 +----------+--------+--------+-----------+-+-+-+-----------+ | | | | |P|A|I| | | OPCODE | RA | RB | IGN |A|B|B| INDEX | | | | | |L|X|X| | +----------+--------+--------+-----------+-+-+-+-----------+ Table 86: HW_MFPR and HW_MTPR Format Description Field Description OPCODE Is either 25 (HW_MFPR) or 29 (HW_MTPR). RA/RB Contain the source,HW_MTPR or destination,HW_MFPR, register number. The RA and RB fields must always be identical. PAL If set this HW_MFPR or HW_MTPR instruction is referencing a PAL temporary register, PAL_TEMP. ABX If set this HW_MFPR or HW_MTPR instruction is referencing a register in the Abox. IBX If set this HW_MFPR or HW_MTPR instruction is referencing a register in the Ibox. INDEX Specifies hardware specific register as shown in Table 87 The following table indicates how the PAL, ABX, IBX, and INDEX fields are set to access the internal processor registers. Setting the PAL, ABX, and IBX fields to zero generates a NOP. Table 87: IPR Access Mnemonic PAL ABX IBX INDEX Access Comments TB_TAG x x 1 0 W PAL mode only ITB_PTE x x 1 1 R/W PAL mode only ICCSR x x 1 2 R/W ITB_PTE_TEMP x x 1 3 R PAL mode only Cobra Specific ( Privileged Architecture Library Code ) PALcode 225
Copyright © 1993 Digital Equipment Corporation. Table 87 (Cont.): IPR Access Mnemonic PAL ABX IBX INDEX Access Comments EXC_ADDR x x 1 4 R/W SL_RCV x x 1 5 R ITBZAP x x 1 6 W PAL mode only ITBASM x x 1 7 W PAL mode only ITBIS x x 1 8 W PAL mode only PS x x 1 9 R/W EXC_SUM x x 1 10 R/W PAL_BASE x x 1 11 R/W HIRR x x 1 12 R SIRR x x 1 13 R/W ASTRR x x 1 14 R/W HIER x x 1 16 R/W SIER x x 1 17 R/W ASTER x x 1 18 R/W SL_CLR x x 1 19 W SL_XMIT x x 1 22 W DTB_CTL x 1 x 0 W DTB_PTE x 1 x 2 R/W DTB_PTE_TEMP x 1 x 3 R MMCSR x 1 x 4 R VA x 1 x 5 R DTBZAP x 1 x 6 W DTASM x 1 x 7 W DTBIS x 1 x 8 W BIU_ADDR x 1 x 9 R BIU_STAT x 1 x 10 R DC_ADDR x 1 x 11 R DC_STAT x 1 x 12 R FILL_ADDR x 1 x 13 R ABOX_CTL x 1 x 14 W ALT_MODE x 1 x 15 W CC x 1 x 16 W CC_CTL x 1 x 17 W BIU_CTL x 1 x 18 W FILL_SYNDROME x 1 x 19 R BC_TAG x 1 x 20 R FLUSH_IC x 1 x 21 W FLUSH_IC_ASM x 1 x 23 W 21064 Only PAL_TEMP[31..0] 1 x x 31-00 R/W 226 Cobra Specific ( Privileged Architecture Library Code ) PALcode
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Copyright © 1993 Digital Equipment Corporation.<br />
Table 87 (Cont.): IPR Access<br />
Mnemonic PAL ABX IBX INDEX Access Comments<br />
EXC_ADDR x x 1 4 R/W<br />
SL_RCV x x 1 5 R<br />
ITBZAP x x 1 6 W PAL mode only<br />
ITBASM x x 1 7 W PAL mode only<br />
ITBIS x x 1 8 W PAL mode only<br />
PS x x 1 9 R/W<br />
EXC_SUM x x 1 10 R/W<br />
PAL_BASE x x 1 11 R/W<br />
HIRR x x 1 12 R<br />
SIRR x x 1 13 R/W<br />
ASTRR x x 1 14 R/W<br />
HIER x x 1 16 R/W<br />
SIER x x 1 17 R/W<br />
ASTER x x 1 18 R/W<br />
SL_CLR x x 1 19 W<br />
SL_XMIT x x 1 22 W<br />
DTB_CTL x 1 x 0 W<br />
DTB_PTE x 1 x 2 R/W<br />
DTB_PTE_TEMP x 1 x 3 R<br />
MMCSR x 1 x 4 R<br />
VA x 1 x 5 R<br />
DTBZAP x 1 x 6 W<br />
DTASM x 1 x 7 W<br />
DTBIS x 1 x 8 W<br />
BIU_ADDR x 1 x 9 R<br />
BIU_STAT x 1 x 10 R<br />
DC_ADDR x 1 x 11 R<br />
DC_STAT x 1 x 12 R<br />
FILL_ADDR x 1 x 13 R<br />
ABOX_CTL x 1 x 14 W<br />
ALT_MODE x 1 x 15 W<br />
CC x 1 x 16 W<br />
CC_CTL x 1 x 17 W<br />
BIU_CTL x 1 x 18 W<br />
FILL_SYNDROME x 1 x 19 R<br />
BC_TAG x 1 x 20 R<br />
FLUSH_IC x 1 x 21 W<br />
FLUSH_IC_ASM x 1 x 23 W 21064 Only<br />
PAL_TEMP[31..0] 1 x x 31-00 R/W<br />
226 Cobra Specific ( Privileged Architecture Library Code ) PALcode