Sable CPU Module Specification

Copyright © 1993 Digital Equipment Corporation.
If the location found in the B-Cache does not have the same address as the address
found in the EV-FILL_ADDR register then the error occurred on the data bus between
the 21064 and C4. Generally this type of error is indicative of a hard fault; however if
a simple test of the interface passes then the error may be recoverable after scrubbing
affected locations and restarting the failing instruction.
NOTE
If the EDC error has a syndrome of 1F (which indicates an uncorrectable error),
this means the data store of the cache was written with an intentionally
bad EDC pattern as a result of the CUCERR L signal being asserted during
a B-Cache read fill or write update.
Refer to Chapter 8, Section 8.2.2 for further details.
7.1.1.3.5 B-Cache Data Single Bit EDC Error
Current CPU B-Cache EDC Error C4 Detected
Refer to Section 7.1.1.3.3.
7.1.1.3.6 B-Cache Data Uncorrectable EDC Error
Current CPU B-Cache EDC Error C4 Detected
Refer to Section 7.1.1.3.4.
7.1.1.3.7 21064 Data bus Single Bit EDC Error
EDC error occurred on the bus as the data was being driven from the 21064 to the
C4. Generally this type of error is indicative of a hard fault; however if a simple test
of the interface passes then the error may be recoverable after scrubbing affected
locations and restarting the failing instruction.
Refer to Section 7.1.1.3.3.
7.1.1.3.8 21064 Data bus Uncorrectable EDC Error
EDC error occurred on the bus as the data was being driven from the 21064 to the
C4. Generally this type of error is indicative of a hard fault; however if a simple test
of the interface passes then the error may be recoverable after scrubbing affected
locations and restarting the failing instruction.
Refer to Section 7.1.1.3.4.
Exceptions and Interrupts 171