24531904_j

CFM.sor = 0;
CFM.rrb.gr = 0;
CFM.rrb.fr = 0;
CFM.rrb.pr = 0;
} else // normal branch return
CFM = AR[PFS].pfm;
rse_enable_current_frame_load();
AR[EC] = AR[PFS].pec;
if (PSR.cpl u< AR[PFS].ppl) { // ... and restores privilege
PSR.cpl = AR[PFS].ppl;
lower_priv_transition = 1;
}
}
break;
case ‘ia’: // switch to IA mode
tmp_taken = 1;
if (qp != 0)
illegal_operation_fault();
if (AR[BSPSTORE] != AR[BSP])
illegal_operation_fault();
if (PSR.di)
disabled_instruction_set_transition_fault();
PSR.is = 1; // set IA-32 Instruction Set Mode
CFM.sof = 0; //force current stack frame
CFM.sol = 0; //to zero
CFM.sor = 0;
CFM.rrb.gr = 0;
CFM.rrb.fr = 0;
CFM.rrb.pr = 0;
rse_invalidate_non_current_regs();
//compute effective instruction pointer
EIP{31:0} = tmp_IP{31:0} - AR[CSD].Base;
// Note the register stack is disabled during IA-32 instruction
// set execution
break;
case ‘cloop’: // simple counted loop
if (slot != 2)
illegal_operation_fault();
tmp_taken = (AR[LC] != 0);
if (AR[LC] != 0)
AR[LC]--;
break;
case ‘ctop’:
case ‘cexit’: // SW pipelined counted loop
if (slot != 2)
illegal_operation_fault();
if (btype == ‘ctop’) tmp_taken = ((AR[LC] != 0) || (AR[EC] u> 1));
if (btype == ‘cexit’)tmp_taken = !((AR[LC] != 0) || (AR[EC] u> 1));
if (AR[LC] != 0) {
AR[LC]--;
AR[EC] = AR[EC];
PR[63] = 1;
rotate_regs();
} else if (AR[EC] != 0) {
AR[LC] = AR[LC];
AR[EC]--;
PR[63] = 0;
第 3 巻 : 命令リファレンス 3:23