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Abstract-Band - Fakultät für Informatik, TU Wien - Technische ...

Abstract-Band - Fakultät für Informatik, TU Wien - Technische ...

Abstract-Band - Fakultät für Informatik, TU Wien - Technische ...

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tation of the well-known synchronous Phase King consensus algorithm using<br />

single-bit serial communication and the design of a suitable testbench for<br />

verifying its operation. The implementation is finally integrated into an existing<br />

prototype and testbench of the self-stabilizing Byzantine fault-tolerant distributed<br />

clock generation scheme FATAL+, where it is used to generate 17-bit<br />

wide synchronized clocks without increasing the stabilization time of the underlying<br />

scheme. The thesis also explores implementation alternatives and provides<br />

the correctness proofs of the employed algorithm.<br />

Karoly David Pados<br />

Design and Evaluation of an AXI4 Bus System<br />

Studium: Masterstudium <strong>Technische</strong> <strong>Informatik</strong><br />

BetreuerIn: Ao.Univ.Prof. Dr. Andreas Steininger<br />

To make system integration in VLSI designs easier and modular, a common<br />

interface for IP cores is desirable. Modules with standardized interfaces can be<br />

more easily integrated into existing designs or swapped out for new parts,<br />

should the need arise. Such an interface and the bus system that connects<br />

multiple components need to comply with several non-trivial requirements, like<br />

efcient power utilization, high throughput, low latency, being easily adaptable<br />

to multiple types of IP cores and providing implementation exibility to system<br />

integrators. For this reason, a number of competing interface standards have<br />

emerged. The focus of this thesis is the implementation and evaluation of such<br />

a standard and the accompanying interconnect for the AMBA AXI4 (Advanced<br />

eXtensible Interface version 4) bus. First, system-on-a-chip (SoC) bus systems<br />

and state of the art protocols are described to establish a good understanding<br />

and broad knowledge of the topic in general. Then functional and<br />

synthesizable IP cores are developed and presented for AXI4. These cores<br />

range from simple master and slave devices to fully functional interconnects, as<br />

well as components to support interoperability with older devices of the AMBA<br />

protocol suit. Also developed in this thesis are a simulation driver and a<br />

protocol monitor/checker to support validation. The components are then<br />

applied to the Scarts microprocessor where they are tested in a live<br />

environment. A detailed comparison of AXI4 and AMBA2 AHB is provided.<br />

Matej Pavlovic<br />

Implementation of a Distributed Computation Framework<br />

Studium: Masterstudium <strong>Technische</strong> <strong>Informatik</strong><br />

BetreuerIn: Univ.Prof. Dr. Ulrich Schmid<br />

A recent paper "On Dynamic Distributed Computing" by Sébastien Gambs,<br />

Rachid Guerraoui, Florian Huc and Anne-Marie Kermarrec presents new<br />

algorithms that make it possible to perform reliable distributed computation on<br />

a dynamic network of nodes, despite a Byzantine adversary controlling an important<br />

fraction of the nodes. The network is partitioned into clusters of small<br />

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