Gecko3 - CCC Event Weblog

E. Quellcode
FIFORESET = 0 x80 ; // s e t NAKALL b i t to NAK a l l t r a n s f e r s from h o s t
SYNCDELAY;
55 FIFORESET = 0 x06 ; // r e s e t EP6 FIFO
SYNCDELAY;
FIFORESET = 0 x00 ; // c l e a r NAKALL b i t to resume normal o p e r a t i o n
SYNCDELAY;
}
60 }
}
} while ( ! ( GPIFTRIG & 0 x80 ) ) ; // wait f o r DONE b i t from waveform
SYNCDELAY;
65 EP6BCL = 0 x00 ;
SYNCDELAY;
EP6BCL = 0 x80 ; // rearm EP2OUT
SYNCDELAY;
}
70 }
void g p i f r d w a v e f o r m ( void )
{
EP8GPIFFLGSEL = 0 x10 ; // s e t GPIF FIFO f l a g to f u l l
75 i f ( GPIFTRIG & 0 x80 ) // i f GPIF i n t e r f a c e IDLE
{
i f ( ! ( EP2468STAT & bmEP8FULL ) ) // check EP8 FULL( busy ) b i t in EP2468STAT
(SFR) , core s e t ’ s t h i s b i t when FIFO i s f u l l
{
GPIFTCB1 = MSB( Tcount ) ; // s e t u p t r a n s a c t i o n count with Tcount
v a l u e
80 SYNCDELAY;
GPIFTCB0 = LSB( Tcount ) ;
SYNCDELAY;
GPIFTRIG = GPIFREAD | GPIF EP8 ; // launch GPIF FIFO READ Transaction to
EP8IN ( p o l l i n g )
85 SYNCDELAY;
do
{
temp=(IOE&0x07 ) ; // read GPIF debug pins PE[ 0 : 2 ] f o r l o o k i n g t h e
c u r r e n t s t a t e ( show GSTAT in TRM)
i f ( temp==(IOE&0x07 ) ) // i f GPIF in t h e same s t a t e
90 {
for ( i =0; i