Gecko3 - CCC Event Weblog
Gecko3 - CCC Event Weblog
Gecko3 - CCC Event Weblog
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F.1. Gecko 3, Stand 9. Dezember 2006<br />
io-bus2<br />
io-bus2.SchDoc<br />
power<br />
power.SCHDOC<br />
A A<br />
fpga<br />
fpga.SCHDOC<br />
FL<br />
ethernet<br />
flash.SchDoc<br />
ethernet.SCHDOC<br />
Flash_D1_[0..15]<br />
Flash_DQ[0..15]<br />
Flash_D0_[0..15]<br />
LED[0..7]<br />
Flash_A[0..23]<br />
Switch[0..3]<br />
TX_EN<br />
Flash_A[0..23]<br />
Flash_A[0..23]<br />
Button[0..2]<br />
TX_CLK<br />
Flash_BYTE<br />
Flash_BYTE<br />
TXD_[0..3]<br />
Flash_WE<br />
Flash_WE<br />
Flash_RP<br />
Flash_RP<br />
RX_CLK<br />
Flash_OE<br />
Flash_OE<br />
TX_EN<br />
RX_DV<br />
Flash_CE0<br />
Flash_CE0<br />
TX_CLK<br />
RX_ER<br />
B TXD_[0..3]<br />
RXD_[0..3]<br />
B<br />
RX_CLK<br />
RAM<br />
RX_DV<br />
CRS<br />
dram.SCHDOC<br />
RX_ER<br />
COL<br />
Dram_D0_[0..15]<br />
Dram_DQ[0..15]<br />
Dram_D0_[0..15]<br />
RXD_[0..3]<br />
Dram_A0_[0..13]<br />
Dram_A[0..13]<br />
Dram_A0_[0..13]<br />
Dram_LDM0<br />
CRS<br />
MDC<br />
Dram_LDM<br />
Dram_UDM0<br />
COL<br />
MDIO<br />
Dram_UDM<br />
Dram_CS0<br />
Dram_CS<br />
Dram_WE0<br />
MDC<br />
Dram_WE<br />
Dram_CAS0<br />
MDIO<br />
Dram_CAS<br />
Dram_RAS0<br />
PWR_DOWN/INT<br />
Dram_RAS<br />
Dram_CKE0<br />
PWR_DOWN/INT<br />
ETH_RESET<br />
Dram_CKE<br />
Dram_CK0<br />
ETH_RESET<br />
Dram_CK<br />
Dram_CK0<br />
Dram_CK<br />
Dram_BA0_1<br />
i2c<br />
Dram_BA1<br />
Dram_BA0_0<br />
i2c.SchDoc<br />
Dram_BA0<br />
Dram_LDQS0<br />
Dram_LDQS<br />
Dram_UDQS0<br />
Vbus_sw<br />
Dram_UDQS<br />
SDA<br />
Dram_D1_[0..15]<br />
Dram_D1_[0..15]<br />
SCL<br />
Dram_A1_[0..13]<br />
Dram_A1_[0..13]<br />
D[0..15]<br />
Dram_LDM1<br />
BUSY/RDYX<br />
usb<br />
Dram_UDM1<br />
INIT_B/WRX<br />
RAM<br />
usb.SCHDOC<br />
Dram_CS1<br />
RDWR_B/WRU<br />
dram.SCHDOC<br />
Dram_WE1<br />
CS_B/RDYU<br />
SDA<br />
C Dram_DQ[0..15]<br />
Dram_CAS1<br />
SCL<br />
C<br />
Dram_A[0..13]<br />
Dram_RAS1<br />
Dram_CKE1<br />
PROG_B<br />
D[0..15]<br />
Dram_LDM<br />
Dram_CK1<br />
CCLK<br />
BUSY/RDYX<br />
Dram_UDM<br />
Dram_CK1<br />
DONE<br />
INIT_B/WRX<br />
Dram_CS<br />
Dram_BA1_1<br />
RDWR_B/WRU<br />
Dram_WE<br />
Dram_BA1_0<br />
CS_B/RDYU<br />
Dram_CAS<br />
Dram_LDQS1<br />
RESET<br />
Dram_RAS<br />
Dram_UDQS1<br />
Dram_CKE<br />
PROG_B<br />
Dram_CK<br />
CCLK<br />
Dram_CK<br />
DONE<br />
Dram_BA1<br />
Dram_BA0<br />
SCLK<br />
Dram_LDQS<br />
MOSI<br />
Dram_UDQS<br />
MISO<br />
SPI_CS_F<br />
TCK<br />
TDI<br />
TDO<br />
TMS<br />
Serial out<br />
Serial in<br />
Power Good<br />
Low Battery<br />
GPIO1_[0..59]<br />
PWM[0..7]<br />
Encoder[0..7]<br />
Sensors[0..5]<br />
SPI_CS_F<br />
MISO<br />
MOSI<br />
SCLK<br />
MD[0..31]<br />
MA[0..25]<br />
DQM[0..3]<br />
RDnWR<br />
nOE<br />
nWE<br />
nCS1<br />
nCS3<br />
nCS4<br />
RDY<br />
DREQ[1..2]<br />
GPIO2[0..34]<br />
SDA_ext<br />
SCL_ext<br />
EXTCLK0<br />
EXTCLK1<br />
Reset<br />
Flash_BYTE<br />
Flash_WE<br />
Flash_RP<br />
Flash_OE<br />
Flash_CE0<br />
Vbus_sw<br />
Vbus<br />
spi-flash<br />
jtag<br />
io-bus<br />
spi-flash.SchDoc<br />
jtag.SchDoc<br />
io-bus.SchDoc<br />
SCLK<br />
MOSI<br />
MISO<br />
D<br />
SPI_CS_F<br />
D<br />
Titel <strong>Gecko3</strong>: SoC Development Platform<br />
Blattgrösse: A3 Nummer:<br />
Revision: 0.7<br />
Datum: 08.12.2006 Zeit: 15:21:29 Blatt von 18<br />
Datei: C:\Documents and Settings\ zimmc5\svn\top.SchDoc<br />
Berne School of Applied Science<br />
School of Engineering and<br />
Information Technology<br />
Quellgasse 21<br />
CH-2501 Biel<br />
1<br />
TCK<br />
TDI<br />
TDO<br />
TMS<br />
Serial out<br />
Serial in<br />
Power Good<br />
Low Battery<br />
GPIO1_[0..59]<br />
PWM[0..7]<br />
Encoder[0..7]<br />
Sensors[0..5]<br />
Vbus<br />
MA[0..25]<br />
MD[0..31]<br />
DQM[0..3]<br />
RDnWR<br />
nOE<br />
nWE<br />
nCS1<br />
nCS3<br />
nCS4<br />
RDY<br />
DREQ[1..2]<br />
GPIO2[0..34]<br />
SCL_ext<br />
SDA_ext<br />
EXTCLK0<br />
EXTCLK1<br />
Reset<br />
FL<br />
flash.SchDoc<br />
switches<br />
switches.SchDoc<br />
Flash_DQ[0..15]<br />
Flash_A[0..23]<br />
Reset<br />
LED[0..7]<br />
Switch[0..3]<br />
Button[0..2]<br />
Abbildung F.1.: Blockdiagramm<br />
Project Report 123
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